Casio CTK-611 User Manual Page 8

  • Download
  • Add to my manuals
  • Print
  • Page
    / 25
  • Table of contents
  • BOOKMARKS
  • Rated. / 5. Based on customer reviews
Page view 7
— 6 —
CPU (LSI1: UPD913GF-3BA)
The 16-bit CPU contains a 1k-byte RAM, three 8-bit I/O ports, two timers, a key controller and serial interfaces.
The CPU detects key velocity by counting the time between first-key input signal FI and second-key SI from
the keyboard. The CPU reads sound data and velocity data from the sound source ROM in accordance with
the selected tone; the CPU can read rhythm data simultaneously when a rhythm pattern is selected. Then the
CPU provides 16-bit serial sound data to the DSP. The CPU also controls MIDI input/output and stores
sequencer data into the working storage RAM.
The following table shows the pin functions of LSI1.
Pin No. Terminal In/Out Function
1 TXD0 Out MIDI signal output
2 RXD0 In MIDI signal input
3 SCK0 Out APO (Auto Power Off) signal output
4, 5 TXD1, RXD2 In/Out Data bus for the LCD driver
6 SCK1 Out 1 MHZ synchronizing pulse output
7 AVCC In DVDD (+5 V) source
8 AN0 In
AC adaptor detection terminal.
+5 V when the keyboard is powered by batteries and becomes
0
V to cancel the APO function when AC adaptor is connected.
9 AN1 Not used. Connected to ground.
10 AGND In Ground (0 V) source
11 BCK Out Bit clock output
12 SO Out Serial sound data output
13 LRCK Out Word clock output
14 GND In Ground (0 V) source
15, 16 XLT0, XLT1 In/Out 20 MHz clock input/output
17 VCC In +5 V source
18, 19 MD0, MD1 In Mode selection terminal
20 RSTB In Reset signal input
21 NMI In Power ON signal input
22 INT/P10 In/Out Data bus for the LCD driver
23 ~ 30
FI0 ~ FI3
In Terminal for key input signal
SI0 ~ SI3
31 ~ 38 KC0 ~ KC7 Out Terminal for key scan signal
39 ~ 46
FI4 ~ FI7
In Terminal for key input signal
SI4 ~ SI7
47 ~ 50
FI8, FI9
Not used
SI8, SI9
51 FI10 In Terminal for button input signal
52 SI10/P23 Out Chip enable signal for the LCD driver
53 ~ 55 KI0 ~ KI2 In Terminal for button input signal
56 MWNB Out Write enable signal for the DSP
57 ~ 76 MA0 ~ MA17 Out Address bus
77 MCSB0 Out Chip enable signal output for the sound source ROM
78 MCSB1 Out Not used
79 MCSB2 Out Chip enable signal output for the DSP
Page view 7
1 2 3 4 5 6 7 8 9 10 11 12 13 ... 24 25

Comments to this Manuals

No comments